Peripheral Simulation

For Infineon C508 — Compare Timer 2

Simulation support for this peripheral or feature is comprised of:

• Dialog boxes which display and allow you to change peripheral configuration.

These simulation capabilities are described below.

Compare Timer 2 Dialog

The Compare Timer 2 Dialog controls the time base for compare capture registers.

Compare Timer 2 Group

• Clock contains the value that is divided into the oscillator frequency to produce the compare timer 2 clock.
• CT2CON (Compare Timer Control Register) holds the clock selection settings, the interrupt and overflow flags.
• Status (Capture Timer Status) indicates the current state of the capture timer.
• CT2 (Compare Timer) holds the current 16-bit compare timer 2 value.
• CP2 (Compare Timer Period Register) contains the period value to be matched with compare timer 2.
• CT2R (Compare Timer 2 Run/Stop Control) when set, starts compare timer 2. Resetting this bit stops compare timer 2.
• CT2RES (Compare Timer 2 Reset Control) is set to clear the compare timer 2 value. If this bit is reset, the compare timer 2 value does not change when compare timer 2 is stopped (CT2R).
• STE2 (CAPCOM Unit Shadow Latch Transfer Enable) is set to transfer the period (CP2) and compare (CC) registers into the real registers when compare timer 2 reaches the next timer event. STE2 is reset by hardware.

Interrupt Group

• ECT2 (Compare Timer 2 Interrupt Enable) is set to enable compare timer 2 interrupts.
• CT2P (Compare Timer 2 Period Flag) is set when compare timer 2 reaches the period value. This flag must be cleared by software.