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Peripheral Simulation

For STMicroelectronics STR712FR1 — Buffered SPI: BSPI0

Simulation support for this peripheral or feature is comprised of:

Dialog boxes which display and allow you to change peripheral configuration.
VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

Buffered SPI 0 Dialog

Buffered SPI 0

Buffered SPI0 Input VTREG
Data Type: unsigned short

Buffered SPI0 Output VTREG
Data Type: unsigned short

Get more information about the
Peripheral Simulation Capabilities
of the µVision Debugger.